QuickLogic Expands Strategic Radiation Hardened FPGA Contract with Department of Defense

Total contract ceiling increases to $88 million as QuickLogic achieves key milestone with test chip tape-out for mission-critical defense and space systems. By Embedded Systems Engineering / 18 Dec 2025
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QuickLogic Corporation has announced a significant expansion in the scope of its prime U.S. government contract for the development of Strategic Radiation Hardened (SRH), high-reliability Field Programmable Gate Array (FPGA) technology. This expansion includes the integration of GlobalFoundries’ 12LP fabrication process, raising the total contract ceiling value to approximately $88 million over a multi-year period.

The project is sponsored by the Department of Defense’s (DoD) Trusted and Assured Microelectronics (T&AM) Program, operating under the Office of the Under Secretary of Defense for Research and Engineering (OUSD(R&E)). The Naval Surface Warfare Center (NSWC) Crane serves as the technical lead for the government.

The development of this SRH FPGA technology is designed to meet both identified and future requirements for DoD strategic and space systems. As part of the program’s progress, QuickLogic has finalized the design and completed the tape-out of an FPGA test chip. This chip is scheduled for fabrication by GlobalFoundries using its 12LP process.

QuickLogic specializes as a fabless semiconductor company focused on embedded FPGA (eFPGA) Hard IP, discrete FPGAs, and endpoint AI solutions. The company’s technology is utilized across aerospace, defense, industrial, and computing markets, often combining proprietary hardware with open-source tools to provide customizable, low-power solutions.

“QuickLogic is honored to continue to lead the development of this highly specialized and mission critical program,” said Brian Faith president and CEO of QuickLogic. “We are proud to announce that we have completed the design and tape out for an FPGA test chip that will be fabricated by GlobalFoundries on its 12LP process.”

Posted by Embedded Systems Engineering Connect

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